Dr. Jan Eitzinger

Head of Software & Tools

Erlangen National High Performance Computing Center
Software & Tools

Room 1.025
Martensstr. 1
91058 Erlangen
Germany

Short bio

Jan Eitzinger [formerly Treibig] studied chemical engineering at the University of Erlangen-Nuremberg and holds a PhD in Computer Science from the University of Erlangen-Nuremberg. He is the head of Software&Tools at the Erlangen National High Performance Computing Center (NHR@FAU). Apart from software and tool development he is also interested in architecture-specific and low-level optimisation for current processor architectures, and performance modelling on processor and system level. He is the creator of LIKWID, a collection of lightweight performance tools and contributed the foundations of the ECM model. Jan Eitzinger is also active in teaching and training.

List of publications extracted from CRIS

2021

Ravedutti Lucio Machado R., Eitzinger J., Murbach Maidl A., Weingaertner D.:
An instrumentation framework for performance analysis of halide schedules
In: Journal of Computer Languages (2021), p. 101065
ISSN: 2590-1184
DOI: 10.1016/j.cola.2021.101065
Ravedutti Lucio Machado R., Schmitt J., Eibl S., Eitzinger J., Leißa R., Hack S., Pérard-Gayot A., Membarth R., Köstler H.:
tinyMD: Mapping molecular dynamics simulations to heterogeneous hardware using partial evaluation
In: Journal of Computational Science 54 (2021), Article No.: 101425
ISSN: 1877-7503
DOI: 10.1016/j.jocs.2021.101425

2019

Eitzinger J., Gruber T., Afzal A., Zeiser T., Wellein G.:
ClusterCockpit-A web application for job-specific performance monitoring
2019 IEEE International Conference on Cluster Computing, CLUSTER 2019 (Albuquerque, NM, 2019-09-23 - 2019-09-26)
In: Proceedings - IEEE International Conference on Cluster Computing, ICCC 2019
DOI: 10.1109/CLUSTER.2019.8891017

2018

Schmitt J., Köstler H., Eitzinger J., Membarth R.:
Unified Code Generation for the Parallel Computation of Pairwise Interactions using Partial Evaluation
17th International Symposium on Parallel and Distributed Computing (ISPDC) (Geneva, 2018-06-25 - 2018-06-28)
In: IEEE (ed.): Proceedings of the 17th International Symposium on Parallel and Distributed Computing (ISPDC) 2018
DOI: 10.1109/ISPDC2018.2018.00012
URL: https://ieeexplore.ieee.org/document/8452015/
Schmitt J., Köstler H., Eitzinger J., Membarth R., Pérard-Gayot A.:
Unified Code Generation for the Parallel Computation of Pairwise Interactions using Partial Evaluation
International Symposium on Computational Science at Scale (CoSaS) (Erlangen, 2018-09-05 - 2018-09-07)
URL: https://graphics.cg.uni-saarland.de/papers/schmitt-2018-cosas-poster.pdf

2017

Hammer J., Eitzinger J., Hager G., Wellein G.:
Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels
10th International Workshop on Parallel Tools for High Performance Computing (Stuttgart, Germany, 2016-10-04 - 2016-10-05)
In: Niethammer C, Gracia J, Hilbrich T, Knüpfer A, Resch MM, Nagel WE (ed.): Tools for High Performance Computing 2016, Cham: 2017
Hofmann J., Fey D., Riedmann M., Eitzinger J., Hager G., Wellein G.:
Performance analysis of the Kahan-enhanced scalar product on current multi-core and many-core processors
In: Concurrency and Computation-Practice & Experience 29 (2017)
ISSN: 1532-0626
DOI: 10.1002/cpe.3921
Röhl T., Eitzinger J., Hager G., Wellein G.:
LIKWID monitoring stack: A flexible framework enabling job specific performance monitoring for the masses
2017 IEEE International Conference on Cluster Computing, CLUSTER 2017
DOI: 10.1109/CLUSTER.2017.115

2016

Hager G., Eitzinger J., Habich J., Wellein G.:
Exploring performance and power properties of modern multi-core chips via simple machine models
In: Concurrency and Computation-Practice & Experience 28 (2016), p. 189-210
ISSN: 1532-0626
DOI: 10.1002/cpe.3180
Hofmann J., Fey D., Eitzinger J., Hager G., Wellein G.:
Analysis of intel’s haswell microarchitecture using the ECM model and microbenchmarks
Springer Verlag, 2016
ISBN: 9783319306940
DOI: 10.1007/978-3-319-30695-7_16
Hofmann J., Fey D., Eitzinger J., Hager G., Wellein G.:
Analysis of Intel's Haswell Microarchitecture Using the ECM Model and Microbenchmarks
29th International Conference on Architecture of Computing Systems (Nuremberg)
In: Architecture of Computing Systems -- ARCS 2016: 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings, Cham: 2016
DOI: 10.1007/978-3-319-30695-7_16
Hofmann J., Fey D., Riedman M., Eitzinger J., Hager G., Wellein G.:
Performance analysis of the Kahan-enhanced scalar product on current multi-corecore and many-core processors
In: Concurrency and Computation-Practice & Experience 28 (2016)
ISSN: 1532-0626
DOI: 10.1002/cpe.3921

2015

Hammer J., Hager G., Eitzinger J., Wellein G.:
Automatic loop kernel analysis and performance modeling with kerncraft
6th International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems, PMBS 2015 - Held as part of the 27th ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2015
DOI: 10.1145/2832087.2832092
Hammer J., Hager G., Eitzinger J., Wellein G.:
Automatic Loop Kernel Analysis and Performance Modeling With Kerncraft
SC15 The International Conference for High Performance Computing, Networking, Storage and Analysis (Austin, TX, USA, 2015-11-15)
In: Proceedings of the 6th International Workshop on Performance Modeling, Benchmarking, and Simulation of High Performance Computing Systems, New York, NY, USA: 2015
DOI: 10.1145/2832087.2832092
URL: http://dl.acm.org/citation.cfm?id=2832087&preflayout=flat
Hofmann J., Eitzinger J., Fey D.:
Execution-Cache-Memory Performance Model: Introduction and Validation
(2015)
URL: https://arxiv.org/abs/1509.03118
(Techreport)
Hofmann J., Fey D., Eitzinger J., Hager G., Wellein G.:
Performance analysis of the Kahan-enhanced scalar product on current multicore processors
the 11th International Conference on Parallel Processing and Applied Mathematics (Krakow, Poland)
In: Accepted for PPAM 2015 2015
URL: http://arxiv.org/abs/1505.02586
Wellein G., Eitzinger J., Hager G., Röhl T.:
Overhead Analysis of Performance Counter Measurements
43rd International Conference on Parallel Processing Workshops, ICPPW 2014
DOI: 10.1109/ICPPW.2014.34

2014

Eitzinger J., Hager G., Wellein G., Stengel H.:
Quantifying performance bottlenecks of stencil computations using the Execution-Cache-Memory model
DOI: 10.1145/2751205.2751240
URL: http://arxiv.org/abs/1410.5010
Hofmann J., Eitzinger J., Hager G., Wellein G.:
Comparing the Performance of Different x86 SIMD Instruction Sets for a Medical Imaging Application on Modern Multi- and Manycore Chips
2014 1st ACM SIGPLAN Workshop on Programming Models for SIMD/Vector Processing, WPMVP 2014 - Co-located with PPoPP 2014 (Orlando, USA, 2014-02-16 - 2014-02-16)
In: Proceedings of the 2014 Workshop on Programming models for SIMD/Vector processing, New York, NY, USA: 2014
DOI: 10.1145/2568058.2568068
URL: http://dl.acm.org/citation.cfm?doid=2568058.2568068
Hofmann J., Eitzinger J., Hager G., Wellein G.:
Performance Engineering for a Medical Imaging Application on the Intel Xeon Phi Accelerator
In: ARCS Workshops'14 2014
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6775080&isnumber=6775071

2013

Eitzinger J., Hager G., Hornegger J., Wellein G., Hofmann H.:
Pushing the limits for medical image reconstruction on recent standard multicore processors
In: International Journal of High Performance Computing Applications 27 (2013), p. 162-177
ISSN: 1094-3420
DOI: 10.1177/1094342012442424

2012

Eitzinger J., Hager G., Wellein G.:
Performance Patterns and Hardware Metrics on Modern Multicore Processors: Best Practices for Performance Engineering
5th Workshop on Productivity and Performance (PROPER 2012) (Rhodes Island, Greece)
In: Euro-Par 2012, -: 2012
URL: http://arxiv.org/abs/1206.3738
Hager G., Eitzinger J., Wellein G., Habich J.:
Exploring performance and power properties of modern multicore chips via simple machine models
In: Concurrency and Computation-Practice & Experience Submitted (2012), p. 22
ISSN: 1532-0626
URL: http://arxiv.org/abs/1208.2908
Iglberger K., Hager G., Eitzinger J., Rüde U.:
High performance smart expression template math libraries
High Performance Computing and Simulation (HPCS) 2012 (Madrid, 2012-07-02 - 2012-07-06)
In: High Performance Computing and Simulation (HPCS) 2012, International Conference on 2012
DOI: 10.1109/HPCSim.2012.6266939
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06266939
Sembritzki K., Hager G., Krammer B., Eitzinger J., Wellein G.:
Evaluation of the Coarray Fortran Programming Model on the Example of a Lattice Boltzmann Code
The 6th Conference on Partitioned Global Address Space Programming Models (Santa Barbara, CA, USA)
In: PGAS12, In Press: 2012

2011

Eitzinger J., Wellein G., Hager G.:
Efficient multicore-aware parallelization strategies for iterative stencil computations
In: Journal of Computational Science 2 (2011), p. 130137
ISSN: 1877-7503
DOI: 10.1016/j.jocs.2011.01.010
URL: http://www.sciencedirect.com/science/article/pii/S1877750311000172
Iglberger K., Hager G., Eitzinger J., Rüde U.:
Expression Templates Revisited: A Performance Analysis of the Current ET Methodology
In: SIAM Journal on Scientific Computing (2011), p. 1-15
ISSN: 1064-8275
URL: http://arxiv.org/abs/1104.1729

2010

Eitzinger J., Hager G.:
Introducing a Performance Model for Bandwidth-Limited Loop Kernels
8th International Conference, PPAM 2009 , Revised Selected Papers, Part I (Wroclaw, Poland, 2009-09-13 - 2009-09-16)
In: Parallel Processing and Applied Mathematics, Berlin Heidelberg: 2010
DOI: 10.1007/978-3-642-14390-8_64
URL: http://www.springerlink.com/content/m720118145140122/
Eitzinger J., Hager G., Wellein G.:
Complexities of Performance Prediction for Bandwidth-Limited Loop Kernels on Multi-Core Architectures
Transactions of the Fourth Joint HLRB and KONWIHR Review and Results Workshop (Leibniz Supercomputing Centre, Garching/Munich, Germany)
In: High Performance Computing in Science and Engineering, Garching/Munich 2009, Berlin Heidelberg: 2010
DOI: 10.1007/978-3-642-13872-0_1
URL: http://www.springerlink.com/content/m1288m0174021600/
Eitzinger J., Hager G., Wellein G.:
LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments
39th International Conference on Parallel Processing Workshops (San Diego, CA, USA, 2010-09-13 - 2010-09-16)
In: Proceedings of PSTI2010, the First International Workshop on Parallel Software Tools and Tool Infrastructures, IEEE: 2010
DOI: 10.1109/ICPPW.2010.38
URL: http://arxiv.org/abs/1004.4431
Eitzinger J., Hager G., Wellein G., Meier M.:
LIKWID performance tools
URL: http://inside.hlrs.de/pdfs/inSiDE_spring2010.pdf
Wittmann M., Hager G., Eitzinger J., Wellein G.:
Leveraging shared caches for parallel temporal blocking of stencil codes on multicore processors and clusters
In: Parallel Processing Letters 20 (2010), p. 359-376
ISSN: 0129-6264
DOI: 10.1142/S0129626410000296
URL: http://arxiv.org/abs/1006.3148

2009

Eitzinger J.:
Efficiency Improvements of Iterative Numerical Algorithms on Modern Architectures (Dissertation, 2009)
URL: https://www10.cs.fau.de/publications/dissertations/Diss_Treibig_2009.pdf
Eitzinger, Jan:
Efficiency Improvements of Iterative Numerical Algorithms on Modern Architectures (Dissertation, 2009)
URL: https://www10.cs.fau.de/publications/dissertations/Diss_2009-Treibig.pdf

2008

Stürmer M., Eitzinger J., Rüde U.:
Optimising a 3D multigrid algorithm for the IA-64 architecture
In: International Journal of Computational Science and Engineering 4 (2008), p. 29-35
ISSN: 1742-7185
DOI: 10.1504/IJCSE.2008.021110
URL: https://www10.informatik.uni-erlangen.de/Publications/Papers/2008/Stuermer_IJCSE_4_1.pdf

2006

Eitzinger J., Bergler S., Rüde U.:
ORCAN: A platform for complex parallel simulation software
8th Workshop 'Parallel Programs and Algorithms' (Frankfurt)
In: ARCS 2006 - 19th International Conference on Architecture of Computing Systems, Workshops Proceedings, March 16, 2006, Frankfurt am Main, Germany 2006
Hager G., Zeiser T., Eitzinger J., Wellein G.:
Optimizing performance on modern HPC systems: learning from simple kernel benchmarks
The 2nd Russian-German Advanced Research Workshop (Stuttgart, Germany)
In: Computational Science and High Performance Computing II, Berlin Heidelberg: 2006
DOI: 10.1007/3-540-31768-6_23
URL: http://www.springerlink.com/content/8401n54088177483/
Stürmer M., Eitzinger J., Rüde U.:
Optimizing a 3D Multigrid Algorithm for the IA-64 Architecture
ASIM 2006 - 19. Symposium Simulationstechnik (Hannover)
In: Simulationstechnique - 19th Symposium in Hannover, September 2006, Erlangen: 2006
URL: https://www10.informatik.uni-erlangen.de/Publications/Papers/2006/Stuermer_ASIM2006.pdf

2005

Eitzinger J., Rüde U., Hausmann S.:
Performance analysis of the Lattice Boltzmann Method on x86-64 Architectures
18th Symposium Simulationstechnique ASIM 2005 (Erlangen)
In: 18th Symposium Simulationstechnique ASIM 2005 Proceedings, Erlangen: 2005
URL: https://www10.informatik.uni-erlangen.de/Publications/Papers/2005/Treibig_ASIM05.pdf

2003

Zeiser T., Eitzinger J., Brenner G., Durst F.:
Simulation of highly loaded gas-solid two-phase flows by combining a cellular automata for the particles with a lattice Boltzmann flow solver
In: International Journal of Modern Physics B 17 (2003), p. 201-204
ISSN: 0217-9792
DOI: 10.1142/S0217979203017333