Ayesha Afzal

Ayesha Afzal

Short Bio

Ayesha Afzal is a researcher at Erlangen National High Performance Computing Center (NHR@FAU) in Germany. She holds a master’s degree in computational engineering from the Friedrich-Alexander-Universität, Erlangen-Nürnberg, Germany, and a bachelor’s degree in electrical engineering from the University of Engineering and Technology, Lahore, Pakistan. Her PhD research lies at the crossroads of analytic performance models, performance tools and parallel simulation frameworks, with a focus on first-principles performance modelling of distributed-memory parallel programs in HPC. She also conducts research in multi-core and parallel architectures, parallel computing and algorithms, parallel programming models, and domain-specific languages. She is actively involved in HPC initiatives like KONWHIR with Leibniz Supercomputing Centre (LRZ) on performance optimization and NHR’s project on enhancing energy efficiency and managing operational costs across NHR centers.

Ayesha contributes to the HPC community through various leadership roles. At IEEE Computer Society, she serves as vice chair of both the Germany Section Chapter and Region 8 Area 2. She is the founder of the NHR Women in HPC chapter, organizes workshops like EESP at ISC and PERMAVOST at ACM HPDC, and regularly contributes to scientific community events as a chair, vice chair, program committee member, journal reviewer, panelist, and speaker. She has authored numerous peer-reviewed publications and received first place in the ISC PhD Forum Award 2021, which honors outstanding PhD research. Her accolades also include the IEEE TPDS Best Paper Runner-up Award 2023, the SC PMBS Workshop Best Short Paper Award 2023, SC Best Research Poster Finalist 2024, and the ISC Research Poster Award 2025. She was named to the Top 100 Future Leaders Role Model List 2022–2024, supported by Yahoo Finance and YouTube, and won WeAreTheCity’s Global Award for Achievement in 2023.

 

  • Bachelor thesis, 2025 (ongoing): Implementation of MPI collectives in the DisCostiC simulator framework
  • Master thesis, 2025 (ongoing): Visualizing Global Structures in Distributed-Memory Parallel Programs
  • Master thesis, 2025 (ongoing): Performance Analysis of Desynchronization effects in a Parallel Optical Flow Solver
  • Master thesis, 2024: Extending a Simulation Framework for Performance Assessment of Parallel Applications
  • Bachelor thesis, 2021: Integration of chip-level performance models into a parallel simulation framework
  • Master thesis, 2019: Development of a benchmark suite for investigating MPI communication behavior

  • Energy Modeling and Simulation of Parallel Applications on Clusters
  • Energy Consumption of Modern CPUs and GPUs: A Study with GROMACS Benchmarks

2023

2022

2021

2020

2019

2018

2025

  • Afzal A., Hager G., Wellein G.:
    DisCostiC: Digital Twin Performance Simulations Unlocking Hardware-Software Interplay
    (Best Research Poster Award Finalist)
    ISC High Performance 2025
    (Hamburg, Germany, 2025-06-10/2025-06-13)
    Download: Poster PDF

2024

2023

  • Afzal A., Hager G., Wellein G.:
    Making Applications Run Faster by Slowing Down Processes?
    ISC High Performance 2023
    (Hamburg, Germany, 2023-05-21/2023-05-25)
    Download: Poster PDF

2022

2021

2019