Author: Georg Hager

Our popular PRACE course on "Node-Level Performance Engineering" will take place on December 3-4, 2019 at LRZ Garching. This course covers performance engineering approaches on the compute node level. Even application developers who are fluent in OpenMP and MPI often lack a good grasp of how much...

Category: HPC, Teaching

Our paper "Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels" has just won the "Best Late-Breaking Paper Award" at the 10th Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS19), a renowned workshop co-located with t...

Category: HPC, Tools

This year at SC19 in Denver, CO, members of our group will be part of numerous contributions: Our master student Jan Laukemann will present the paper “Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels” at the PMBS 2019 workshop. It describes recent improvements to ...

Category: Allgemein, HPC

The first "Performance Evaluation Workshop" of the EoCoE-II project was successfully conducted at FAU from October 7-10, 2019. The workshop gave an introduction to node-level performance engineering and to parallel performance analysis using the Paraver tool. EoCoE-II is the second phase of t...

Category: HPC, Teaching

Im „HPC-Village“ auf der Langen Nacht der Wissenschaften am 19. Oktober 2019 präsentiert das RRZE gemeinsam mit seinen Partnern neben den neuesten Technologien verschiedene faszinierende HPC-Anwendungsfelder aus der Praxis. Biologie: Wie funktioniert eine Zellmembran? Klimaforschung: Wie interag...

Category: Allgemein, HPC

Our paper "Performance Engineering for a Tall & Skinny Matrix Multiplication Kernel on GPUs" by Dominik Ernst, Georg Hager, Jonas Thies, and Gerhard Wellein just received the best workshop paper award at PPAM 2019, the 13th International Conference on Parallel Processing and Applied Mathematics,...

Category: Allgemein, HPC

We are pleased to announce an invited talk by Benjamin Huth from the University of Regensburg about "Vectorized matrix-multiplication on the NEC SX-Aurora." The NEC SX-Aurora "Tsubasa" is NEC's latest vector processor architecture. Last year, RRZE has acquired a system with two "Tsubasa" vector a...

Category: All, Systems