NHR PerfLab Seminar: Performance of linear solvers in tensor-train format on current multicore architectures (February 27, hybrid)

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Title: Performance of linear solvers in tensor-train format on current multicore architectures (hybrid)

Speaker: Melven Röhrig-Zöllner, German Aerospace Center (DLR)

Date and time: Tuesday, February 27, 2024, 2:00-3:00 p.m. CET

Location: IT-Schulungsraum (Martensstrasse 3, room 01.135) or via Zoom: https://fau.zoom.us/j/68603607738

Slides: Performance of linear solvers in TT format


This talk discusses the node-level performance of numerical algorithms for handling high-dimensional problems in a compressed tensor format.

It focusses on two problems in particular: (1) approximating large (dense) data (lossy compression) and (2) solving linear systems, both in the tensor-train / matrix-product states format. For both problems, we optimize the required underlying linear algebra operations, respectively the mapping of the high-level algorithm to (potentially less accurate) lower-level operations. In particular, we suggest improvements for costly orthogonalization and truncation steps based on a high-performance implementation of a “Q-less” tall-skinny QR decomposition. Further optimizations for solving linear systems include memory layout optimizations for faster tensor contractions and a simple generic preconditioner. We show performance results on today’s multi-core CPUs where we obtain a speedup of up ~50x over the reference implementation for the lossy compression, and up to ~5x for solving linear systems.

Short Bio

Melven Röhrig-Zöllner studied Computational Engineering Science at the RWTH Aachen. Since 2014, he works as a researcher in the HPC department of the Institute for Software Technology of the German Aerospace Center (DLR). His research focuses on the performance of numerical methods, in particular in the field of numerical linear algebra. He also supports scientific software development for HPC systems in the DLR, e.g., concerning software engineering practices and testing parallel codes.

For a list of past and upcoming NHR PerfLab seminar events, see: https://hpc.fau.de/research/nhr-perflab-seminar-series/