Two papers published at ISC 2020 Digital Conference

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ISC 2020, conducted as a digital event, was a particular success for our group. Two papers were accepted for the conference:

  • C. L. Alappat, J. Hofmann, G. Hager, H. Fehske, A. R. Bishop, and G. Wellein: Understanding HPC Benchmark Performance on Intel Broadwell and Cascade Lake Processors. DOI (Open Access): 10.1007/978-3-030-50743-5_21
    This paper deals with microbenchmark and proxy application performance on two recent Intel processor designs and highlights many of the pitfalls one may encounter with this kind of analysis. In particular, we show that popular microbenchmark collections such as lmbench have to be handled with extreme care. We also construct, for the first time, a proper Roofline model of the HPCG benchmark.
  • A. Afzal, G. Hager, and G. Wellein: Desynchronization and Wave Pattern Formation in MPI-Parallel and Hybrid Memory-Bound Programs.  DOI (Open Access): 10.1007/978-3-030-50743-5_20
    This paper sheds light on the interesting issue of desynchronization in barrier-free bulk-synchronous programs. Desynchronization means that the MPI-parallel program leaves its initially regular, synchronous  compute-communicate structure and develops so-called computational wave patterns, which may provide automatic communication overlap. We show that a bandwidth bottleneck across groups of MPI processes is required for this transition to occur.