NHR PerfLab Seminar: (Re-)Configurable Processor Arrays On-Chip—Low Energy/High Performance Loop Nest Acceleration

Title: (Re-)Configurable Processor Arrays On-Chip—Low Energy/High Performance Loop Nest Acceleration

Speaker: Prof. Dr. Jürgen Teich, Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)

Date and time: Tuesday, July 22, 2025, 2:00 p.m. CEST

Access via Zoom: https://go-nhr.de/perflab-seminar

Please find all information on the following website: https://hpc.fau.de/2025/07/10/re-configurable-processor-arrays-on-chip-low-energy-high-performance-loop-nest-acceleration/

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This online event is organized by Gerhard Wellein / Erlangen National High Performance Computing Center (NHR@FAU, https://nhr.fau.de/) c/o Erlangen Regional Computing Center (RRZE). Inquiries may be sent to hpc-support@fau.de.