NHR PerfLab Seminar: Innovative Scientific Computing by Integration of (Simulation+Data+Learning) in Information Technology Center, The University of Tokyo

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Speaker: Kengo Nakajima, Information Technology Center, The University of Tokyo

Title: Innovative Scientific Computing by Integration of (Simulation+Data+Learning) in Information Technology Center, The University of Tokyo

Date and time: Thursday, June 9, 2:00 p.m. – 3:00 p.m.


Abstract: The Supercomputing Division, Information Technology Center, The University of Tokyo was originally established as the Supercomputing Center of the University of Tokyo in 1965, making it the oldest academic supercomputer center in Japan. The Information Technology Center (ITC) was organized in 1999, and the Supercomputing Center became the Supercomputing Division (SCD) of the ITC. ITC is also a core organization of the “Joint Usage/Research Center for Interdisciplinary Large-Scale Information Infrastructures (JHPCN)”, and a part of HPCI (the High-Performance Computing Infrastructure) operated by the Japanese Government. The three main missions of SCD/ITC are (i) Operations of Supercomputers & Services, (ii) Research & Development, and (iii) Education & Training. Currently, SCD/ITC consists of more than 10 faculty members. SCD/ITC is now operating two supercomputer systems, “Massively Parallel Supercomputer System (Oakbridge-CX)” by Fujitsu with 6.61 PFLOPS, and “Integrated Supercomputer System for Simulation, Data and Learning (Wisteria/BDEC-01)” by Fujitsu with 33.1 PFLOPS. The two systems operated by SCD/ITC contain 2,600+ users; 55+% of these users are from outside the university. Their average utilization ratio is ~90%. Hands-on tutorials for parallel programming (on-line) are held 20+ times per year. Up to 10% of the total computational resources of each system are open to users from the industry.

We propose an innovative method for computational science for sustainable promotion of scientific discovery by supercomputers in the Exascale Era by combining (Simulation + Data + Learning (S+D+L)). In May 2021, we start operation of the Wisteria/BDEC-01 system with 33+PF at University of Tokyo. It is a Hierarchical, Hybrid, Heterogeneous (h3) system, which consists of computing nodes for CSE with A64FX and those for Data Analytics/AI with NVIDIA A100 GPU’s. We develop a software platform “h3-Open-BDEC” for integration of (S+D+L) and evaluate the effects of integration of (S+D+L) on the Wisteria system. The h3-Open-BDEC is designed for extracting the maximum performance of the supercomputers with minimum energy consumption focusing on (1) innovative method for numerical analysis with high-performance/high-reliability/power-saving based on the new principle of computing by adaptive precision, accuracy verification and automatic tuning, (2) Hierarchical Data Driven Approach (hDDA) based on machine learning, and (3) Software & Utility for heterogeneous systems, such as Wisteria/BDEC-01. Integration of (S+D+L) by h3-Open-BDEC enables significant reduction of computations and power consumption, compared to those by conventional simulations.

In this talk, overview of the services and research activities focusing on the integration of (S+D+L) in SCD/ITC will be provided.

Kengo NakajimaSpeaker bio: Kengo Nakajima is a Professor, Supercomputing Research Division, Information Technology Center, the University of Tokyo since 2008. Prior to joining the University of Tokyo in 2004, he spent 19 years in industry. He is also a Deputy Director of RIKEN R-CCS (Cetner for Computational Science) since 2018.

His research interest covers computational mechanics, computational fluid dynamics (CFD), numerical linear algebra, parallel iterative algorithms, parallel preconditioning methods, multigrid methods, parallel programming models, adaptive mesh refinement (AMR), and parallel visualization. B.Eng (1985, Aeronautics, University of Tokyo), M.S. (1993, Aerospace Engineering, University of Texas at Austin), Ph.D. (2003, Engineering Mechanics, University of Tokyo). He also joined ESSEX-II Project (Equipping Sparse Solvers for Exascale, Leading-PI: Gerhard Wellein (FAU Erlangen-Nuremberg)) as a Co-PI from 2015 to 2018. ESSEX-II is supported by DFG/SPPEXA (Germany) and JST/CREST (Japan).